Multilevel memory cell aspects

Full Title

Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor > Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups > Multilevel memory cell aspects

Child Classifications

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• G11C 2211/5611 Multilevel memory cell with more than one control gate
• G11C 2211/5612 Multilevel memory cell with more than one floating gate
• G11C 2211/5613 Multilevel memory cell with additional gates, not being floating or control gates
• G11C 2211/5614 Multilevel memory cell comprising negative resistance, quantum tunneling or resonance tunneling elements
• G11C 2211/5615 Multilevel magnetic memory cell using non-magnetic non-conducting interlayer, e.g. MTJ
• G11C 2211/5616 Multilevel magnetic memory cell using non-magnetic conducting interlayer, e.g. GMR, SV, PSV
• G11C 2211/5617 Multilevel ROM cell programmed by source, drain or gate contacting