G06F 12/0846 Cache with multiple tag or data arrays being simultaneously accessible
Full Title
Accessing, addressing or allocating within memory systems or architectures (digital input from, or digital output to record carriers, e.g. to disk storage units, G06F3/06) > Addressing or allocation; Relocation (program address sequencing G06F9/00; arrangements for selecting an address in a digital store G11C8/00) > in hierarchically structured memory systems, e.g. virtual memory systems > Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches > Multiple simultaneous or quasi-simultaneous cache accessing > Cache with multiple tag or data arrays being simultaneously accessible
2 direct subcodes
Child Classifications
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Top Applicants
Top 10 applicants by patent filingsfor class G06, 2013–2023, worldwide · Source: EPO PATSTAT
- SAMSUNG ELECTRONICS COMPANY KR 76,952
- IBM (INTERNATIONAL BUSINESS MACHINES CORPORATION) US 62,841
- MICROSOFT TECHNOLOGY LICENSING US 44,778
- GOOGLE US 35,735
- INTEL CORPORATION US 32,087
- HUAWEI TECHNOLOGIES COMPANY CN 30,572
- TENCENT TECHNOLOGY (SHENZHEN) COMPANY 25,023
- APPLE US 23,482
- SGCC(STATE GRID CORPORATION OF CHINA) 22,548
- HUAWEI TECHNOLOGIES COMPANY 20,917