CPC Subgroup
G06F 7/501 Half or full adders, i.e. basic adder cells for one denomination
Full Title
Methods or arrangements for processing data by operating upon the order or content of the data handled (logic circuits H03K19/00) > Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation > using non-contact-making devices, e.g. tube, solid state device; using unspecified devices > Adding; Subtracting (G06F7/483 - G06F7/491, G06F7/544 - G06F7/556 take precedence) > Half or full adders, i.e. basic adder cells for one denomination
4 direct subcodes
Child Classifications
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- G06F 7/502 Half adders; Full adders consisting of two cascaded half adders
- G06F 7/503 using carry switching, i.e. the incoming carry being connected directly, or only via an inverter, to the carry output under control of a carry propagate signal
Top Applicants
Top 10 applicants by patent filingsfor class G06, 2013–2023, worldwide · Source: EPO PATSTAT
- SAMSUNG ELECTRONICS COMPANY KR 76,952
- IBM (INTERNATIONAL BUSINESS MACHINES CORPORATION) US 62,841
- MICROSOFT TECHNOLOGY LICENSING US 44,778
- GOOGLE US 35,735
- INTEL CORPORATION US 32,087
- HUAWEI TECHNOLOGIES COMPANY CN 30,572
- TENCENT TECHNOLOGY (SHENZHEN) COMPANY 25,023
- APPLE US 23,482
- SGCC(STATE GRID CORPORATION OF CHINA) 22,548
- HUAWEI TECHNOLOGIES COMPANY 20,917