DIFF Subgroup
G06F 13/1668 Full Title
Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (interface circuits for specific input/output devices G06F3/00 ; multiprocessor systems G06F15/16 ) > Handling requests for interconnection or transfer > for access to memory bus (G06F13/28 takes precedence)
Of 5 combined children, 0 exist in both systems.
5 codes are CPC-only extensions.