G06F 13/32 using combination of interrupt and burst mode transfer
Introduced: January 1985
Full Title
Full titles differ between systems:
Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units > Handling requests for interconnection or transfer > for access to input/output bus > using combination of interrupt and burst mode transfer
Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (interface circuits for specific input/output devices G06F3/00 ; multiprocessor systems G06F15/16 ) > Handling requests for interconnection or transfer > for access to input/output bus > using combination of interrupt and burst mode transfer
IPC and CPC are identically structured here. All 1 subcodes exist in both systems.
IPC defines codes here since 1985.
Child Classifications
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