CPC Subgroup
G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36)
Full Title
Computer-aided design [CAD] > Circuit design > Circuit design at the physical level (physical level design for reconfigurable circuits G06F30/347) > Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36)
Top Applicants
Top 10 applicants by patent filingsfor class G06, 2013–2023, worldwide · Source: EPO PATSTAT
- SAMSUNG ELECTRONICS COMPANY KR 76,952
- IBM (INTERNATIONAL BUSINESS MACHINES CORPORATION) US 62,841
- MICROSOFT TECHNOLOGY LICENSING US 44,778
- GOOGLE US 35,735
- INTEL CORPORATION US 32,087
- HUAWEI TECHNOLOGIES COMPANY CN 30,572
- TENCENT TECHNOLOGY (SHENZHEN) COMPANY 25,023
- APPLE US 23,482
- SGCC(STATE GRID CORPORATION OF CHINA) 22,548
- HUAWEI TECHNOLOGIES COMPANY 20,917