CPC Main Group
H10B 51/00 Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory transistors
5 direct subcodes
Child Classifications
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- H10B 51/10 characterised by the top-view layout
- H10B 51/20 characterised by the three-dimensional [3D] arrangements, e.g. with cells on different height levels
- H10B 51/30 characterised by the memory core region
- H10B 51/40 characterised by the peripheral circuit region
- H10B 51/50 characterised by the boundary region between the core and peripheral circuit regions