Circuit design

Child Classifications

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• G06F 30/31 Design entry, e.g. editors specifically adapted for circuit design since 2020 IPC+CPC Available in IPC and CPC
• G06F 30/32 Circuit design at the digital level (reconfigurable circuits G06F30/34) since 2020 IPC+CPC Available in IPC and CPC
• G06F 30/34 for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD] since 2020 IPC+CPC Available in IPC and CPC
• G06F 30/35 Delay-insensitive circuit design, e.g. asynchronous or self-timed since 2020 IPC+CPC Available in IPC and CPC
• G06F 30/36 Circuit design at the analogue level since 2020 IPC+CPC Available in IPC and CPC
• G06F 30/38 Circuit design at the mixed level of analogue and digital signals since 2020 IPC+CPC Available in IPC and CPC
• G06F 30/39 Circuit design at the physical level (physical level design for reconfigurable circuits G06F30/347) since 2020 IPC+CPC Available in IPC and CPC