Circuit design at the digital level (reconfigurable circuits G06F30/34)

Introduced: January 2020

Title

Titles differ between systems:

IPC: Circuit design at the digital level

CPC: Circuit design at the digital level (reconfigurable circuits G06F30/34)

Full titles differ between systems:

IPC:

Computer-aided design [CAD] > Circuit design > Circuit design at the digital level

CPC:

Computer-aided design [CAD] > Circuit design > Circuit design at the digital level (reconfigurable circuits G06F30/34)

IPC and CPC are identically structured here. All 5 subcodes exist in both systems.

IPC defines codes here since 2020.

Navigate with arrow keys, Enter to open

G06F 30/323 Translation or migration, e.g. logic to logic, hardware description language [HDL] translation or netlist translation since 2020 IPC+CPC Available in IPC and CPC
G06F 30/327 Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist since 2020 IPC+CPC Available in IPC and CPC
G06F 30/33 Design verification, e.g. functional simulation or model checking since 2020 IPC+CPC Available in IPC and CPC
G06F 30/333 Design for testability [DFT], e.g. scan chain or built-in self-test [BIST] since 2020 IPC+CPC Available in IPC and CPC
G06F 30/337 Design optimisation since 2020 IPC+CPC Available in IPC and CPC

Class G06,2013–2023, worldwide · Source: EPO PATSTAT

Class G06,2013–2023, worldwide · Source: EPO PATSTAT