Cache consistency protocols

Full Title

Accessing, addressing or allocating within memory systems or architectures > Addressing or allocation; Relocation > in hierarchically structured memory systems, e.g. virtual memory systems > Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches > Multiuser, multiprocessor or multiprocessing cache systems > Cache consistency protocols

Classification Context

Section:

PHYSICS

Class:

COMPUTING OR CALCULATING; COUNTING

Subclass:

ELECTRIC DIGITAL DATA PROCESSING

Child Classifications

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• G06F 12/0817 using directory methods
• G06F 12/0831 using a bus scheme, e.g. with bus monitoring or watching means
• G06F 12/0837 with software control, e.g. non-cacheable data