IPC Subgroup
G11C 7/2 Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
Introduced: January 2000
Last revised: January 2006
Full Title
Arrangements for writing information into, or reading information out from, a digital store > Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
Classification Context
- Section:
- PHYSICS
- Class:
- INFORMATION STORAGE
- Subclass:
- STATIC STORES