IPC Subgroup
H03L 7/183 a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
Introduced: January 1990
Last revised: January 2006
Full Title
Automatic control of frequency or phase; Synchronisation > using a reference signal applied to a frequency- or phase-locked loop > Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop > using a frequency divider or counter in the loop > a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
Classification Context
- Section:
- ELECTRICITY
- Class:
- ELECTRONIC CIRCUITRY
- Subclass:
- AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
5 direct subcodes
Child Classifications
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- H03L 7/185 using a mixer in the loop
- H03L 7/187 using means for coarse tuning the voltage controlled oscillator of the loop
- H03L 7/191 using at least two different signals from the frequency divider or the counter for determining the time difference
- H03L 7/193 the frequency divider/counter comprising a commutable pre-divider, e.g. a two modulus divider
- H03L 7/195 in which the counter of the loop counts between two different non zero numbers, e.g. for generating an offset frequency
Top Applicants
Top 10 applicants by patent filingsfor class H03, 2013–2023, worldwide · Source: EPO PATSTAT
- QUALCOMM US 5,625
- SAMSUNG ELECTRONICS COMPANY KR 5,496
- MURATA MANUFACTURING COMPANY JP 5,478
- HUAWEI TECHNOLOGIES COMPANY CN 3,383
- INTEL CORPORATION US 3,091
- TEXAS INSTRUMENTS US 3,070
- MURATA MANUFACTURING COMPANY 2,722
- SKYWORKS SOLUTIONS US 2,290
- SEIKO EPSON CORPORATION 2,177
- IBM (INTERNATIONAL BUSINESS MACHINES CORPORATION) US 2,158