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IPC Subgroup
H03M 13/05

using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits

Introduced: January 2000

Last revised: January 2006

Full Title

Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes > Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words > using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits

Classification Context

Section:
ELECTRICITY
Class:
ELECTRONIC CIRCUITRY
Subclass:
CODING, DECODING OR CODE CONVERSION, IN GENERAL

5 direct subcodes

Child Classifications

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  • H03M 13/07 Arithmetic codes
  • H03M 13/09 Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
  • H03M 13/11 using multiple parity bits
  • H03M 13/21 Non-linear codes, e.g. m-bit data word to n-bit code word [mBnB] conversion with error detection or error correction

Top Applicants

Top 10 applicants by patent filingsfor class H03, 2013–2023, worldwide · Source: EPO PATSTAT

  1. QUALCOMM US 5,625
  2. SAMSUNG ELECTRONICS COMPANY KR 5,496
  3. MURATA MANUFACTURING COMPANY JP 5,478
  4. HUAWEI TECHNOLOGIES COMPANY CN 3,383
  5. INTEL CORPORATION US 3,091
  6. TEXAS INSTRUMENTS US 3,070
  7. MURATA MANUFACTURING COMPANY 2,722
  8. SKYWORKS SOLUTIONS US 2,290
  9. SEIKO EPSON CORPORATION 2,177
  10. IBM (INTERNATIONAL BUSINESS MACHINES CORPORATION) US 2,158