Control of the bit-mapped memory

Full Title

Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators (image data processing or generation, in general G06T) > characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory > Control of the bit-mapped memory

Child Classifications

Navigate with arrow keys, Enter to open

• G09G 5/391 Resolution modifying circuits, e.g. variable screen formats
• G09G 5/393 Arrangements for updating the contents of the bit-mapped memory
• G09G 5/395 Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen (G09G5/399 takes precedence)
• G09G 5/399 using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers