with source and drain on different levels, e.g. with sloping channels

Introduced: January 2023

Full Title

EEPROM devices comprising charge-trapping gate insulators > characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels > with source and drain on different levels, e.g. with sloping channels

Classification Context

Section:: ELECTRICITY
Class:: SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
Subclass:: ELECTRONIC MEMORY DEVICES

1 direct subcode

Child Classifications

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H10B 43/27 the channels comprising vertical portions, e.g. U-shaped channels