Configurations of stacked chips

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Package configurations > Configurations of stacked chips

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• H10W 90/22 the stacked chips being on both top and bottom sides of a package substrate, interposer or RDL
• H10W 90/231
• H10W 90/24 at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape
• H10W 90/26 the stacked chips being of the same size without any chips being laterally offset, e.g. chip stacks having a rectangular shape
• H10W 90/271
• H10W 90/275
• H10W 90/28 the stacked chips having different sizes, e.g. chip stacks having a pyramidal shape
• H10W 90/284
• H10W 90/288
• H10W 90/291
• H10W 90/293
• H10W 90/297