GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

Description

H10W covers the physical packaging, interconnection architectures, connector designs, and structural elements applicable to semiconductor and solid-state devices classified under H10. This includes lead frames, bonding techniques, encapsulation materials, mounting substrates, and electrical connection schemes that are not device-type specific. The classification addresses generic constructional aspects that may apply across multiple semiconductor technologies (diodes, transistors, integrated circuits, etc.) when those aspects are not better covered by technology-specific classes.

17 direct subcodes

Child Classifications

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H10W 10/00 Isolation regions in semiconductor bodies between components of integrated devices
H10W 15/00 Highly-doped buried regions of integrated devices
H10W 20/00 Interconnections in chips, wafers or substrates
H10W 29/00 Generic parts of integrated devices, not otherwise provided for
H10W 40/00 Arrangements for thermal protection or thermal control (integrated devices comprising arrangements for thermal protection H10D89/60)
H10W 42/00 Arrangements for protection of devices (arrangements for thermal protection H10W40/00)
H10W 44/00 Electrical arrangements for controlling or matching impedance
H10W 46/00 Marks applied to devices, e.g. for alignment or identification
H10W 70/00 Package substrates; Interposers; Redistribution layers [RDL]
H10W 72/00 Interconnections or connectors in packages
H10W 74/00 Encapsulations, e.g. protective coatings
H10W 76/00 Containers; Fillings or auxiliary members therefor; Seals
H10W 78/00 Detachable holders for supporting packaged chips in operation
H10W 80/00 Direct bonding of chips, wafers or substrates
H10W 90/00 Package configurations
H10W 95/00 Packaging processes not covered by the other groups of this subclass
H10W 99/00 Subject matter not provided for in other groups of this subclass