Interconnections in chips, wafers or substrates

Introduced: January 2026

Of 3 combined children, 2 exist in both systems.

1 codes are CPC-only extensions.

IPC defines codes here since 2026.

Child Classifications

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H10W 20/01 +3 CPC CPC only CPC only
H10W 20/20 Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] since 2026 +3 CPC IPC+CPC Available in IPC and CPC
H10W 20/40 Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes since 2026 +5 CPC IPC+CPC Available in IPC and CPC