IPC Subgroup
G01R 31/319 Tester hardware, i.e. output processing circuits
Introduced: January 1995
Last revised: January 2006
Full Title
Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere > Testing of electronic circuits, e.g. by signal tracer > Testing of digital circuits > Functional testing > Tester hardware, i.e. output processing circuits
Classification Context
- Section:
- PHYSICS
- Class:
- MEASURING; TESTING
- Subclass:
- MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
1 direct subcode
Child Classifications
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- G01R 31/3193 with comparison between actual response and known fault-free response
Top Applicants
Top 10 applicants by patent filingsfor class G01, 2013–2023, worldwide · Source: EPO PATSTAT
- SGCC(STATE GRID CORPORATION OF CHINA) 41,447
- CHINESE ACADEMY OF SCIENCES 32,952
- ROBERT BOSCH DE 16,470
- SAMSUNG ELECTRONICS COMPANY KR 10,052
- SINOPEC (CHINA PETROCHEMICAL CORPORATION) 9,573
- ZHEJIANG UNIVERSITY 9,529
- GUANGDONG POWER GRID CORPORATION 8,615
- TSINGHUA UNIVERSITY 7,805
- HALLIBURTON ENERGY SERVICES GROUP US 7,796
- QUALCOMM US 7,171