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IPC Subclass
H10P

GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS

Introduced: January 2026

Classification Context

Section:
ELECTRICITY
Class:
SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
Subclass:
GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS

Description

H10P covers generic manufacturing and treatment processes applicable across the broader category of semiconductor and solid-state electronic devices classified in H10. This subclass encompasses general-purpose fabrication techniques, processing methods, and apparatus that are not device-type specific but serve multiple device categories within H10. Examples include wafer preparation, doping processes, thermal treatment, surface modifications, and testing procedures that apply broadly to semiconductor manufacture. Classification here is appropriate when the invention relates to process steps or equipment of general applicability rather than techniques tied to particular device architectures (which would be classified in more specific H10 subclasses).

Scope Notes

Application references: Electronic memory devices Inorganic electric semiconductor devices Inorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation Inorganic light-emitting semiconductor devices having potential barriers Organic electric solid-state devices Electric solid-state devices not otherwise provided for

Related Keywords

manufacture or treatment of SEMICONDUCTOR(S) devices

17 direct subcodes

Child Classifications

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  • H10P 10/00 Bonding of wafers, substrates or parts of devices
  • H10P 56/00 Debonding of wafers, substrates or parts of devices
  • H10P 58/00 Singulating wafers or substrates into multiple chips, i.e. dicing
  • H10P 70/00 Cleaning of wafers, substrates or parts of devices
  • H10P 90/00 Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement